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 om .c 4U et he aS TO at : General .D w DATE : Sep. 13, 2002 w w
SAMSUNG TFT-LCD SAMSUNG TFT-LCD
PRELIMINARY
NOTE :
The information described in this SPEC is preliminary and can be changed without prior notice.
om .c APPROVED BY : 4U PREPARED BY : Application Engineering 1 Group et he aS SAMSUNG ELECTRONICS CO., LTD. at .D w Page 1 / 24 Doc.No. Rev.No LTN154X1-L02 04-P00-G-020725 w w
m o MODEL NO. :: LTN154X1-L02 MODEL NO. LTN154X1-L02 .c U t4 e e h S ta a .D w w w
CONTENTS
PRELIMINARY
Record Of Revision General Description 1. Absolute Maximum Ratings 1.1 Absolute Ratings of Environment 1.2 Electrical Absolute Maximum Ratings 2. Optical Characteristics 3. Electrical Characteristics 3.1 TFT LCD Module 3.2 Back Light Unit 4. Block Diagram 4.1 TFT LCD Module 4.2 Back Light Unit
-------------------( 3 ) -------------------( 4 ) -------------------( 5 )
-------------------( 7 ) - - - - - - - - - - - - - - - - - - - ( 11 )
- - - - - - - - - - - - - - - - - - - ( 14 )
5. Input Terminal Pin Assignment - - - - - - - - - - - - - - - - - - - ( 15 ) 5.1 Input Signal & Power 5.2 LVDS Interface:Transmitter 5.3 Back Light Unit 5.4 Timing Diagrams of LVDS for Transmission 5.5 Input Signals, Basic Display Colors and Gray Scale of Each Color. 5.6 Pixel Format 6. Interface Timing - - - - - - - - - - - - - - - - - - - ( 20 ) 6.1 Timing Parameters(DE MODE) 6.2 Timing Diagrams of interface Signal (DE MODE) 6.3 Power ON/OFF Sequence
7. Outline Dimension 8. General Precaution
- - - - - - - - - - - - - - - - - - - ( 22 ) - - - - - - - - - - - - - - - - - - - ( 23 )
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REVISION HISTORY REVISION HISTORY
Date Jul.25.2002. Rev.No. P00 Page ALL Summary LTN154X1-L02model was first issued
PRELIMINARY
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GENERAL DESCRIPTION
DESCRIPTION
PRELIMINARY
LTN154X1 is a color active matrix TFT (Thin Film Transistor) liquid crystal display (LCD) that uses amorphous silicon TFT as a switching devices. This model is composed of a TFT LCD panel, a driver circuit, a back-light system. The resolution of a 15.4 contains 1280 x 800 pixels and can display up to 262,144colors. 6 o'clock direction is the optimum viewing angle. FEATURES * Thin and light weight * High contrast ratio, high aperture structure * Super Wide Viewing Angle * Fast Response Time * Wide XGA (1280x800 pixels) resolution * Low power consumption * Single CCFL * DE(Data enable) only mode * 3.3V LVDS Interface * Onboard EEDID chip APPLICATIONS * Notebook PC and desktop monitors * Display terminals for AV application products * Monitors for Industrial machine * If the usage of this product is not for PC application, but for others, please contact SEC
GENERAL INFORMATION ITEM Display area Driver element Display colors Number of pixel Pixel arrangement Pixel pitch Display Mode Surface treatment SPECIFICATION 331.2max(H) x 207.0max(V) (15.4 diagonal ) a-Si TFT active matrix 262,144 1280 X RGB(3) X 800 RGB vertical stripe 0.25875(H) x 0.25875 (V) Normally white HAZE (25), HARD-COATING (3H) mm pixels UNIT mm NOTE
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PRELIMINARY
Mechanical Information
ITEM Horizontal (H) Module size Vertical (V) Thickness (T) Weight (g) MIN. 343.5 221.5 TYP. 344.0 222.0 MAX. 344.5 222.5 6.5 610 PMMA LCD module only NOTE
1. ABSOLUTE MAXIMUM RATINGS
1.1 ENVIRONMENTAL ABSOLUTE RATINGS
ITEM Storage temperature Operating temperature (Temperature of glass surface) Shock ( Non-operating ) SYMBOL TSTG MIN. -25 MAX. 65 UNIT C C G G NOTE (1) (1) (2),(4)
TOPR Snop Vnop
0 -
50 220 1. 5
Vibration (Non-operating)
(3),(4)
Note (1) Temperature and relative humidity range are shown in the figure below. 90 % RH Max. ( 40C Ta) Maximum wet - bulb temperature at 39C or less. (Ta > 40C) No condensation.
100
90
Relative Humidity ( %RH)
80 60 40 20
5
Operating Range
Storage Range
0 20 40 60 80
0 -40 -20
Temperature (OC)
(2) 220G, 2ms, Half sine wave, one time for X, Y, Z axis (3) 10 ~ 300 ~ 10 Hz, Sweep rate 10min, 30min for X, Y,Z axis (4) At testing Vibration and Shock, the fixture in holding the Module to be tested have to be hard and rigid enough so that the Module would not be twisted or bent by the fixture.
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PRELIMINARY
1.2 ELECTRICAL ABSOLUTE RATINGS (1) TFT LCD MODULE
ITEM Power Supply Voltage Logic Input Voltage NOTE (1) Within Ta = 25 2 C SYMBOL VDD VIN MIN. Vss -0.3 Vss -0.3 MAX. 3.8 VDD+0.3 UNIT V V VDD =3.3, Vss=GND= 0V NOTE
(1) (1)
(2) BACK-LIGHT UNIT
ITEM Lamp current Lamp frequency SYMBOL IL FL MIN. 2.0 50 MAX. 7.0 80 UNIT. mArms KHz
Ta = 25 2 C NOTE (1) (1)
NOTE (1) Permanent damage to the device may occur if maximum values are exceeded. Functional operation should be restricted to the conditions described under Normal Operating Conditions.
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2. OPTICAL CHARACTERISTICS
PRELIMINARY
The following items are measured under stable conditions. The optical characteristics should be measured in a dark room or equivalent state with the methods shown in Note (7). Measuring equipment : TOPCON BM-5A
* Ta = 25 2C , VDD=3.3V, fv= 60Hz, fDCLK=68.9MHz, IL = 6.0mA ITEM Contrast Ratio (5 Points) Response Time at Ta Rising Falling SYMBOL CONDITION CR TR TF YL,AVE RX RY Green Color Chromaticity ( CIE ) Blue BY WX White WY R Hor. Viewing Angle Ver. 13 Points White Variation L H L L CR( at center point) 10 0.299 0.329 65 65 50 50 0.359 Degrees 1.8 (5),(6),(7) (1) (0.125) 0.283 (0.155) 0.313 (0.185) 0.343 GX GY BX = 0, =0 MIN. 170 (0.550) (0.310) (0.280) (0.520) (0.125) TYP. 300 10 15 185 (0.580) (0.340) (0.310) (0.550) (0.155) MAX. 15 20 (0.610) (0.370) (0.340) (0.580) PR650 (0.185) cd/m2 (4) at 6.0mA msec UNIT NOTE (1), (2), (7) (1), (3)
Average Luminance of White (5 Points) Red
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PRELIMINARY
Note 1) Definition of Viewing Angle : Normal Line = 0o, = 0o L R L =90o L H 12 O'clock direction H = 90o
x
y
6 O' clock direction L= 90o
y'
x'
R =90o
Note 2) Definition of Contrast Ratio (CR)
=
Luminance of all pixel white Luminance of all pixel dark
CR1 + CR2 + CR3 + CR4 + CR5 CR = 5 POINTS : 1, 2 2 , 3 , 4 , 5 at FIGURE OF NOTE 6)
Note 3) Definition of Response time :
Display data
White(TFT OFF)
Black(TFT ON)
White(TFT OFF)
TR Optical Response 100% 90%
TF
10% 0% Time
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PRELIMINARY
Note 4) Definition of Average Luminance of White : measure the luminance of white at 5 points. 320 Average Luminance of White ( Y L,AVE ) 1 YL1 + YL2 + YL3 + YL4 + YL5 Y L,AVE = 5 3 5 400 2 200 640 960
4
600
Note 5) The luminance uniformity of 13 points is defined by dividing the maximum luminance values by the minimum test point luminance
13 Points Luminance Uniformity
=
Max Luminance (13 pts, 1~13) Min Luminance (13 pts, 1~13)
Note 6) Luminance uniformity measurement performed at the 13 points and 5 points as defined in the drawing below. 320 6 10mm 1 640 7 2 960 8 200
VIEW AREA
9
5
10
400
: test point
3 10mm 11 10mm 12
4 13
600
10mm
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PRELIMINARY
Note 7) After stabilizing and leaving the panel alone at a given temperature for 30 minutes, the measurement should be executed. Measurement should be executed in a stable, windless,and dark room. 30 minutes after lighting the back-light. This should be measured in the center of screen. Lamp current : 6.0 mA Environment condition : Ta = 25 2 C
Photodetector ( TOPCON BM-5A)
Field = 2
o
40 cm TFT-LCD module LCD panel
Center of the screen Optical characteristics measurement setup
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3. ELECTRICAL CHARACTERISTICS
3.1 TFT LCD MODULE
PRELIMINARY
Ta = 25 2 C
ITEM Voltage of Power Supply Differential Input Voltage for LVDS Receiver Threshold High Low
SYMBOL VDD VIH VIL fv fH fDCLK IRUSH White
MIN 3.0 -100 -
TYP 3.3 60 48.96 68.9 TBD TBD TBD
MAX 3.6 +100 (1.5) TBD
UNIT V mV
NOTE
(1) mV Hz KHz MHz A mA mA mA (4) (2),(3)*a (2),(3)*b (2),(3)*c
Vsync Frequency Hsync Frequency Main Frequency Rush Current
Electric Circuit Power Consumption
Mosaic Maximum Pattern
IDD
-
Note (1) Condition : VCM=+1.2V(Common mode Voltage) (2) fV=60Hz, fDCLK = 68.9 MHz, Vdd = 3.3V , DC Current. (3) Power dissipation check pattern
*a) White Pattern
VIEW AREA Display Brightest Gray Level
*b)Mosaic Pattern
Display Darkest Gray Level
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PRELIMINARY
*c) Maximum Power pattern : 1dot inversion
(4) Rush current measurement condition
3.3V
M1 2SK1059
VDD ( LCD
R1 47K FUSE C1 1uF
INPUT)
R2 CONTROL SIGNAL
(HIGH to LOW)
1K
M2 2SK1399
12V
R3 47K
C2
C3 1uF
10000pF
VDD rising time is 470us 0.9VDD 3.3V
0.1VDD GND 470us
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3.2 BACK-LIGHT UNIT
PRELIMINARY
The backlight system is an edge - lighting type with a single CCFT ( Cold Cathode Fluorescent Tube ). The characteristics of a single lamp are shown in the following tables. INVERTER : SIC 130T(SEMCO, fL=60KHz) ITEM Lamp Current Lamp Voltage Frequency
Power Consumption Operating Life Time Startup Voltage
Ta = 25 2C TYP TBD (60) TBD MAX (6.0) (65) TBD TBD 0.5 UNIT mArms Vrms KHz W Hr Vrms Vrms NOTE (1) IL=6.0mA (2) (3) IL=6.0mA (4) 25C 0C (5)
SYMB IL VL fL PL Hr VS
MIN (3.0) (50) 10000 -
Lamp Startup Time
VS
-
-
sec
Note) The waveform of the inverter output voltage must be area symmetric and the design of the inverter must have specifications for the modularized lamp. The performance of the back-light, for example life time or brightness, is much influenced by the characteristics of the DC-AC inverter for the lamp. So all the parameters of an inverter should be carefully designed so as not to produce too much leakage current from high-voltage output of the inverter. When you design or order the inverter, please make sure that a poor lighting caused by the mismatch of the back-light and the inverter(miss lighting, flicker, etc.) never occur. When you confirm it, the module should be operated in the same condition as it is installed in your instrument. Note (1) Lamp current is measured with a high frequency current meter as shown below.
LCD MODULE
1 2
HOT : Pink COLD : WHITE
A
INVERTER
SIC 130T
No 2 Pin is VLOW. (2) Lamp frequency may produce interference with horizontal synchronous frequency and this may cause line flow on the display. Therefore lamp frequency should be detached from the horizontal synchronous frequency and its harmonics as far as possible in order to avoid interference. (3) refer to IL X VL to calculate. (4) Life time (Hr) of a lamp can be defined as the time in which it continues to operate under the condition Ta = 25 2C and IL = 6.0 mArms until one of the following event occurs. 1. When the brightness becomes 50% or lower than it's original. 2. When the Effective ignition length becomes 80% or lower than it's original value. (Effective ignition length is defined as an area that has less than 70% brightness compared to the brightness in the center point.) (5) The voltage above this value should be applied to the lamp for more than 1 second to startup Otherwise the lamp may not be turned on.
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PRELIMINARY
4. BLOCK DIAGRAM
4.1 TFT LCD Module
LVDS
RSDS
UserConnector
LVDS Receiver & Timing Controller Source Driver ICs
15.4"WXGA TFT-LCD Panel
DC-DC Converter
Gamma Generator
Video Signal Control Signal VCOM Gamma DVDD AVDD Von/Voff
VCOM Generator
SOURCE PCB
Gate Driver ICs
4.2 BACKLIGHT UNIT Reflector
1 HOT (PINK) LAMP
2 COLD(WHITE)
Note) The output of the inverter may change according to the material of the reflector.
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5. INPUT TERMINAL PIN ASSIGNMENT
PIN# 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Doc.No. SYMBOL VSS VDD VDD V EEDID NC Clk EEDID DATA EEDID RxIN0RxIN0+ VSS RxIN1RxIN1+ VSS RxIN2RxIN2+ VSS ClkINClkIN+ VSS NC NC NC NC NC NC NC NC NC NC NC LTN154X1-L02 Ground Power Supply, 3.3 V (typical ) Power Supply, 3.3 V (typical) DDC 3.3V power No connect DDC Clock DDC Data LVDS differential data input LVDS differential data input Ground LVDS differential data input LVDS differential data input Ground LVDS differential data input LVDS differential data input Ground LVDS differential clock input LVDS differential clock input Ground No connect No connect No connect No connect No connect No connect No connect No connect No connect No connect No connect Rev.No 04-P00-G-020725 FUNCTION
PRELIMINARY
POLARITY REMARK
5.1. Input Display Signal & Power (Input Connector : JAE, FI-XB30SL-HF10)
Negative Positive
R0-R5, G0
Negative Positive
G1-G5, B0-B1
Negative Positive
B2-B5, HS,VS,DE
Negative Positive
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5.2 LVDS Interface Transmitter SN75LVDS86 or Compatible
Pin No. 44 45 47 48 1 3 4 6 7 9 10 Name TxIN0 TxIN1 TxIN2 TxIN3 TxIN4 TxIN5 TxIN6 TxIN7 TxIN8 TxIN9 TxIN10 RGB Signal R0 R1 R2 R3 R4 R5 G0 G1 G2 G3 G4 Pin No. 12 13 15 16 18 19 20 22 23 25 26 Name TxIN11 TxIN12 TxIN13 TxIN14 TxIN15 TxIN16 TxIN17 TxIN18 TxIN19 TxIN20
PRELIMINARY
RGB Signal G5 B0 B1 B2 B3 B4 B5 Hsync Vsync DE Clock
TxCLK IN
Graphics controller 18-bit RED0
RED1 RED2 RED3 RED4 RED5 GREEN0 GREEN1 GREEN2 GREEN3 GREEN4 GREEN5 BLUE0 BLUE1 BLUE2 BLUE3 BLUE4 BLUE5 Hsync Vsync Enable CLOCK
SN75LVDS86 or Compatible TxIN0 TxOUT0TxIN1 TxIN2 TxIN3 TxOUT0+ TxIN4 TxIN5 TxOUT1TxIN6 TxIN7 TxIN8 TxOUT1+ TxIN9 TxIN10 TxIN11 TxOUT2TxIN12 TxIN13 TxOUT2+ TxIN14 TxIN15 TxIN16 TxCLKOUTTxIN17 TxIN18 TxIN19 TxCLKOUT+ TxIN20 TxClkIN
8 9 11 12 14 15 17 18
100
LXD01813 (LVDS+I/F IC)
RxIN0-
- RxIN0+ RxIN1-
100
- RxIN1+
100
RxIN2-
- RxIN2+ - RxCLKIN-
100
-
RxCLKIN+
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PRELIMINARY
5.3 BACK LIGHT UNIT Connector : JST BHSR - 02VS -1 Mating Connector : JST SM02B-BHSS-1 Pin NO.
1 2
Symbol
HOT COLD
Color
PINK WHITE
Function
High Voltage Low Voltage
5.4 Timing Diagrams of LVDS For Transmission
T
TxCLK OUT RxCLK IN T/7 Rx IN2 RxOUT20 RxOUT19 RxOUT18 RxOUT17 RxOUT16 RxOUT15 RxOUT14
DE
Vsync
Hsync
B5
B4
B3
B2
Rx IN1
RxOUT13 B1
RxOUT12 B0
RxOUT11 G5
RxOUT10 G4
RxOUT9 G3
RxOUT8 G2
RxOUT7 G1
RxIN0
RxOUT6 G0
RxOUT5 R5
RxOUT4
RxOUT3
RxOUT2 R2
RxOUT1 R1
RxOUT0 R0
R4
R3
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PRELIMINARY
5.5 Input Signal,Basic Display Colors and Gray Scale of Each Colors
DA TA S IGNA L CO LOR DISP LAY RE D G RE E N BLUE G RA Y S CA LE LEVEL R0 R1 R2 R3 ~R6 0 R6 1 R6 2 R6 3 G0 G1 G2 G 3 ~G 60 G61 G62 G63 B0 B1 B2 B 3 ~B 60 B61 B62 B63
R0 R1 R2 R3 R4 R5 G 0 G 1 G 2 G 3 G 4 G 5 B 0 B 1 B 2 B 3 B 4 B 5 B L ACK B L UE GREEN B A S IC CO LOR CYAN RE D MAGENTA Y E LLOW W HITE B L ACK DA RK G RA Y S CA LE OF RE D L IGHT RE D B L ACK DA RK G RA Y S CA LE OF G RE E N L IGHT G RE E N B L ACK DA RK G RA Y S CA LE OF B L UE L IGHT B L UE 0 0 0 0 1 1 1 1 0 1 0 : : 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 0 1 1 1 1 0 0 1 : : 0 1 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 0 1 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 0 1 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 0 1 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 0 1 1 1 1 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 1 1 0 0 1 1 0 0 0 : : 0 0 0 0 1 0 : : 1 0 1 0 0 0 : : 0 0 0 0 0 1 1 0 0 1 1 0 0 0 : : 0 0 0 0 0 1 : : 0 1 1 0 0 0 : : 0 0 0 0 0 1 1 0 0 1 1 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 1 1 0 0 1 1 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 1 1 0 0 1 1 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 0 1 1 0 0 1 1 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 0 0 : : 0 0 0 0 1 0 1 0 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 1 0 : : 1 0 1 0 1 0 1 0 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 1 : : 0 1 1 0 1 0 1 0 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 1 0 1 0 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 1 0 1 0 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1 0 1 0 1 0 1 0 1 0 0 0 : : 0 0 0 0 0 0 : : 0 0 0 0 0 0 : : 1 1 1
Note (1) Definition of Gray : Rn : Red Gray, Gn : Green Gray, Bn : Blue Gray (n = Gray level) (2) Input Signal : 0 = Low level voltage, 1 = High level voltage
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5.6 PIXEL FORMAT Pixel 1 Line 1
RGB RGB
PRELIMINARY
Pixel 1280
RGB RGB
LTN154X1-L02
Line 800
RGB RGB
RGB RGB
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PRELIMINARY
6. INTERFACE TIMING
6.1 Timing Parameters
Signal Frame Frequency Vertical Active Display Term One Line Scanning Time Horizontal Active Display Term Item Cycle Display Period Cycle Display Period Symbol TV TVD TH THD Min (804) (1368) Typ 816 800 1408 1280 Max (900) (1800) Unit lines lines clocks clocks
6.2 Timing diagrams of interface signal
TV
TVD DE
TH
DCLK TC THD DE
DATA SIGNALS
Valid display data ( 1280 pixel)
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6.3 Power ON/OFF Sequence : To prevent a latch-up or DC operation of the LCD module, the power on/off sequence should be as the diagram below. Power Supply 0.9 VDD VDD 0.1 VDD
0V 0.9 VDD 0.1 VDD
PRELIMINARY
0 < T1 10 msec 0 < T2 50 msec 0 < T3 50 msec 400ms T4
0V
T1 T2 Signals
VALID
T3 T4
Power On
Power Off
Back-light 200 msec T5 200 msec < T6 T5
50%
50%
T6
Power ON/OFF Sequence
T1 : Vdd rising time from 10% to 90% T2 : The time from Vdd to valid data at power ON. T3 : The time from valid data off to Vdd off at power Off. T4 : Vdd off time for Windows restart T5 : The time from valid data to B/L enable at power ON. T6 : The time from valid data off to B/L disable at power Off.
NOTE. (1) The supply voltage of the external system for the module input should be the same as the definition of VDD. (2) Apply the lamp voltage within the LCD operation range. When the back-light turns on before the LCD operation or the LCD turns off before the back-light turns off, the display may momentarily become white. (3) In case of VDD = off level, please keep the level of input signals on the low or keep a high impedance. (4) T4 should be measured after the module has been fully discharged between power off and on period. (5) Interface signal shall not be kept at high impedance when the power is on.
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8. GENERAL PRECAUTIONS
1. Handling
PRELIMINARY
(a) When the module is assembled, It should be attached to the system firmly using every mounting holes. Be careful not to twist and bend the modules. (b) Refrain from strong mechanical shock and / or any force to the module. In addition to damage, this may cause improper operation or damage to the module and CCFT back-light. (c) Note that polarizers are very fragile and could be easily damaged. Do not press or scratch the surface harder than a HB pencil lead. (d) Wipe off water droplets or oil immediately. If you leave the droplets for a long time, Staining and discoloration may occur. (e) If the surface of the polarizer is dirty, clean it using some absorbent cotton or soft cloth. (f) The desirable cleaners are water, IPA(Isoprophyl Alcohol) or Hexane. Do not use Ketone type materials(ex. Acetone), Ethyl alcohol, Toluene, Ethyl acid or Methyl chloride. It might permanent damage to the polarizer due to chemical reaction. (g) If the liquid crystal material leaks from the panel, it should be kept away from the eyes or mouth . In case of contact with hands, legs or clothes, it must be washed away thoroughly with soap. (h) Protect the module from static , it may cause damage to the C-MOS Gate Array IC. (i) Use fingerstalls with soft gloves in order to keep display clean during the incoming inspection and assembly process. (j) Do not disassemble the module. (k) Do not pull or fold the lamp wire. (l) Do not adjust the variable resistor which is located on the back side. (m) Protection film for polarizer on the module shall be slowly peeled off just before use so that the electrostatic charge can be minimized. (n) Pins of I/F connector shall not be touched directly with bare hands.
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2. STORAGE
PRELIMINARY
(a) Do not leave the module in high temperature, and high humidity for a long time. It is highly recommended to store the module with temperature from 0 to 35 C and relative humidity of less than 70%. (b) Do not store the TFT-LCD module in direct sunlight. (c) The module shall be stored in a dark place. It is prohibited to apply sunlight or fluorescent light during the store.
3. OPERATION (a) Do not connect,disconnect the module in the " Power On" condition. (b) Power supply should always be turned on/off by following item 6.3 " Power on/off sequence ". (c) Module has high frequency circuits. Sufficient suppression to the electromagnetic interference shall be done by system manufacturers. Grounding and shielding methods may be important to minimize the interference. (d) The cable between the back-light connector and its inverter power supply shall be a minimized length and be connected directly . The longer cable between the back-light and the inverter may cause lower luminance of lamp(CCFT) and may require higher startup voltage(Vs). 4. OTHERS (a) Ultra-violet ray filter is necessary for outdoor operation. (b) Avoid condensation of water. It may result in improper operation or disconnection of electrode. (c) Do not exceed the absolute maximum rating value. ( the supply voltage variation, input voltage variation, variation in part contents and environmental temperature, so on) Otherwise the module may be damaged. (d) If the module displays the same pattern continuously for a long period of time,it can be the situation when the image "sticks" to the screen. (e) This module has its circuitry PCB's on the rear side and should be handled carefully in order not to be stressed.
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